Kunlun Processor Shows High-Efficiency Error Correction in Quantum Computing
Demonstration of low-overhead quantum error correction codes
The successful demonstration of low-overhead quantum error correction (QEC) codes represents a major advancement in the development of fault-tolerant quantum computing. Advanced quantum low-density parity-check (qLDPC) codes have been implemented on the Kunlun, a powerful new superconducting processor with 32 long-range-coupled transmon qubits, according to research. One of the most important challenges in the industry is addressed by this development: the high resource cost that is typically needed to prevent errors in delicate quantum information.
The Scalability Challenge
For challenging tasks such as factorization, chemical simulation, and machine learning, quantum computers have revolutionary promise. Nevertheless, the physical qubits of these devices are notoriously error-prone. To overcome this, quantum error correction redundantly encodes logical qubits across a large number of physical qubits. This enables researchers to measure “syndromes” to identify and rectify faults.
The surface code was regarded as the best method for this procedure for twenty years. Nevertheless, the surface code has poor encoding efficiency; the number of physical qubits needed grows quadratically as the need for more accuracy (longer code distance) increases, eventually becoming unaffordable for large-scale computers. By employing bivariate bicycle (BB) codes, a class of qLDPC codes renowned for their excellent encoding efficiency and hardware-friendly requirements, the new study avoids this “scalability dilemma”.
Kunlun processor
Specifically created to test sophisticated quantum error-correction algorithms that are beyond the capabilities of current conventional designs, the Kunlun Processor is an experimental superconducting quantum processor. Its significance is more in the way the qubits are connected and managed than in the total number of qubits.
In a seminal work on quantum error correction, a new superconducting quantum processor called Kunlun was introduced in May 2025. The “scalability dilemma” of quantum computing is specifically addressed by this processor.
- Architecture: It has thirty-two transmon qubits that are long-range linked. Kunlun employs a “torus” topology with 84 multi-length adjustable couplers, in contrast to conventional 2D grids that only permit communication between adjacent qubits.
- Innovation: It was able to demonstrate quantum low-density parity-check (qLDPC) codes, or “bivariate bicycle codes.” Compared to the industry-standard “surface code,” these codes are far more efficient and require around four times as many physical qubits to accomplish the same level of error prevention, making this a substantial jump.
- Key Tech: The chip uses “air-bridges” to construct a quasi-3D structure on a planar surface in order to manage the intricate, overlapping connections needed for high-efficiency error correction.
Low-Overhead Quantum Error Correction on the Kunlun Processor
These routines’ effectiveness depended on the Kunlun processor’s distinct architecture. Kunlun Processor was created with a torus connection topology, in contrast to traditional two-dimensional architectures that are restricted to nearest-neighbor interactions. This was accomplished by integrating eighty-four multi-length adjustable couplers, some of which could span up to 6.5 mm.
The team used up to 15 air-bridges per coupler to handle the intricate overlapping connections needed for a degree-6 Tanner graph on a planar semiconductor. These air-bridges essentially create a quasi-three-dimensional structure by enabling couplers to cross over one another without interference. The weight-6 stabilizers employed in these sophisticated codes required that each check qubit be attached to six data qubits, which was made possible by the high connectivity.
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Experimental Advancements
The researchers used the Kunlun Processor hardware to demonstrate two different codes:
- Distance-4 Bivariate Bicycle Code: This code used 14 extra check qubits to encode four logical qubits into 18 data qubits. The logical error rate per cycle for each logical qubit was 8.91 ± 0.17 percent.
- Distance-3 qLDPC Code: The researchers achieved a logical error rate of (7.77 ± 0.12)% by increasing the encoding to six logical qubits on 18 data qubits by eliminating two check operators.
When compared to a surface code of the same distance, the BB code’s encoding rate of 1/8 represented a fourfold reduction in resource overhead. For comparison, the BB code used only 32 physical qubits to do this, while four distance-4 surface codes would take 124.
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Understanding the Syndrome Circuit
A syndrome measuring circuit is periodically executed as part of the error correction procedure. Eight levels of single-qubit gates, seven layers of CZ (controlled-Z) gates, and a readout pulse made up the experiment’s whole cycle, which lasted 1895 ns. High average fidelities of 99.22% for parallel CZ gates and 99.95% for single-qubit gates were attained by the team.
Dephasing error mitigation was a crucial part of the experiment. The data qubits are vulnerable to decoherence because they will be idle while the check qubits are being read. To combat this, the researchers applied ten dynamical decoupling pulses within the 920-ns readout window and placed Pauli X and Y “echo” gates surrounding the CZ gates. Additionally, they introduced leakage rejection, which greatly enhanced the final logical performance by identifying and discarding instances where qubits departed the computational domain using three-state readout.
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The Path Ahead
The researchers stated that although this proof is a “crucial step,” they have not yet reached the “break-even” point, which is the point at which a logical qubit performs better than its component physical qubits. Logical error rates are still higher than physical error rates at the moment.
On the other hand, numerical simulations offered a path forward. The scientists discovered that a transition regime exists at roughly 0.5 times the existing noise levels by multiplying the current physical error rates by a suppression factor. Logical errors will then be exponentially suppressed by increasing the coding distance.
Higher gate fidelities, fault-tolerant implementation of universal logical gate sets, and extending the Kunlun Processor architecture to accommodate increasingly bigger qLDPC codes will be the main goals of future study. This successful experiment demonstrates that long-range, superconducting processors constitute a strong and promising platform for the upcoming generation of large-scale, effective quantum computers.
